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DISCRETE SEMICONDUCTORS
DATA SHEET
PHP1035 P-channel enhancement mode MOS transistor
Preliminary specification File under Discrete Semiconductors, SC13b 1998 Feb 18
Philips Semiconductors
Preliminary specification
P-channel enhancement mode MOS transistor
FEATURES * Very low RDSon * High-speed switching * No secondary breakdown * Direct interface to C-MOS, TTL, etc. APPLICATIONS * Power management * DC-DC converters * General purpose switch. DESCRIPTION P-channel enhancement mode MOS transistor in an 8-pin SOT96-1 (SO8) SMD plastic package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling.
1 Top view 4
handbook, halfpage 8
PHP1035
PINNING - SOT96-1 (SO8) PIN 1 2 3 4 5 6 7 8 SYMBOL s s s g d d d d source source source gate drain drain drain drain DESCRIPTION
5
d
g
s
MAM398
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA SYMBOL VDS VSD VGSO VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation IS = -1.25 A; VGD = 0 open drain ID = -1 mA; VDS = VGS Ts = 80 C ID = -4 A; VGS = -10 V Ts = 80 C CONDITIONS - - - -1 - - - MIN. MAX. -30 -1.3 20 - -8 35 4 V V V V A m W UNIT
1998 Feb 18
2
Philips Semiconductors
Preliminary specification
P-channel enhancement mode MOS transistor
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS VGSO ID IDM Ptot PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation open drain Ts = 80 C; note 1 note 2 Ts = 80 C Tamb = 25 C; note 3 Tamb = 25 C; note 4 Tstg Tj IS ISM Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. 3. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 27.5 K/W. 4. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 90 K/W. THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point VALUE 17.5 storage temperature operating junction temperature Ts = 80 C note 2 CONDITIONS - - - - - - - -55 -55 - - MIN.
PHP1035
MAX. -30 20 -8 -32 4 2.78 1.16 +150 +150 -3 -12 V V A A
UNIT
W W W C C
Source-drain diode source current (DC) peak pulsed source current A A
UNIT K/W
1998 Feb 18
3
Philips Semiconductors
Preliminary specification
P-channel enhancement mode MOS transistor
CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IGSS RDSon Ciss Coss Crss QG QGS QGD PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current gate leakage current drain-source on-state resistance input capacitance output capacitance reverse transfer capacitance total gate charge gate-source charge gate-drain charge CONDITIONS VGS = 0; ID = -10 A VGS = VDS ; ID = -1 mA VGS = 0; VDS = -24 V VGS = 20 V; VDS = 0 VGS = -4.5 V; ID = 2 A VGS = -10 V; ID = -4 A VGS = 0; VDS = -24 V; f = 1 MHz VGS = 0; VDS = -24 V; f = 1 MHz VGS = 0; VDS = -24 V; f = 1 MHz VGS = -10 V; VDD = -15 V; ID = -4 A; Tamb = 25 C VDD = -15 V; ID = -4 A; Tamb = 25 C VDD = -15 V; ID = -4 A; Tamb = 25 C VGS = 0 to -10 V; VDD = -15 V; ID = -1 A; Rgen = 6 VGS = -10 to 0 V; VDD = -15 V; ID = -1 A; Rgen = 6 MIN. -30 -1 - - - - - - - - - - TYP. - - - - - - tbf tbf tbf tbf tbf tbf
PHP1035
MAX. - - -100 100 50 35 - - - - - -
UNIT V V nA nA m m pF pF pF pC pC nC
Switching times td(on) tf ton td(off) tr toff VSD trr turn-on delay time fall time turn-on switching time turn-off delay time rise time turn-off switching time VGD = 0; IS = -1.25 A IS = -1.25 A; di/dt = 100 A/s - - - - - - - - tbf tbf tbf tbf tbf tbf - tbf - - - - - - -1.3 - ns ns ns ns ns ns
Source-drain diode source-drain forward voltage reverse recovery time V ns
1998 Feb 18
4
Philips Semiconductors
Preliminary specification
P-channel enhancement mode MOS transistor
PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm
PHP1035
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03S JEDEC MS-012AA EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-02-04 97-05-22
1998 Feb 18
5
Philips Semiconductors
Preliminary specification
P-channel enhancement mode MOS transistor
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
PHP1035
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1998 Feb 18
6
Philips Semiconductors
Preliminary specification
P-channel enhancement mode MOS transistor
NOTES
PHP1035
1998 Feb 18
7
Philips Semiconductors - a worldwide company
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For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1998
Internet: http://www.semiconductors.philips.com
SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
135108/00/01/pp8
Date of release: 1998 Feb 18
Document order number:
9397 750 03221

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